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SMIC Overview SMIC IPs SMIC MPW Schedule
SMIC MPW Schedule
To serve all customers smoothly, please kindly be reminded:
1. Only standard Process / Layers products can attend MPW.
2. Shuttles are subject to cancellation f there are not enough passengers on board.
3. Provide Complete Database before cutoff date (Complete database means IP merge and DRC have
... been done).
4. DB needs to be submitted 7 working days prior to cutoff date, if SMIC is requested to perform DRC.
5. MPW only provides Die shipment and not more than 100 Dies.
Note : LG = logic, MS = Mix Signal, LL = Low Leakage, CIS = CMOS Image Sensor, HV = High Voltage.
    Jan. Feb. Mar. Apr. May. Jun. Jul. Aug. Sep. Oct. Nov. Dec.
0.35um 2P3M EEPROM 3.3V/5V         26         27    
0.35um 2P3M EEPROM/HV EE,3.3/5 (HV,3.3/5/18) 21                      
0.35um 2P4M Mixed Signal/Logic 3.3V/5V 28       5       1      
0.18um 1P6M Logic 1.8/3.3 14 19 10 14 19 23 14 11 8 13 17 8
0.18um 1P6M Mixed Signal/RF 1.8/3.3 7   31   12 9     15   3 15
0.18um 1P6M Mixed Signal/RF/HV 1.8/3.3     10         4        
0.18um 1P6M Mixed Signal/RF/LL 1.8/3.3     17         25        
0.18um 1P6M Mixed Signal/RF/CIS 1.8/3.3 28     21     14     13    
0.18um 2P6M EEPROM 1.8/3.3 28     7   30     22      
0.18um 2P6M EM-Flash 1.8/3.3       14       25        
0.13um 1P8M Mixed Signal/Logic/RF 1.2/2.5[3.3] 15 18   14   16 14 18   20   15
0.13um 1P8M Mixed Signal/RF/LG/LL 1.2/2.5[3.3]       19             17  
0.13um 1P8M Mixed Signal/RF/LG/0.11 1.2/2.5[3.3]     17           15      
0.09um 1P9M Logic/LL/G 1.8/2.5; 1.8/3.3   19   7   2   4   13   8